Welcome to Loïc Cudennec Website

  • Kalray MPPA-256 Many-core Processor
  • Intel Itanium Processor
  • Tera 100 / TGCC / Curie
  • Smart Manufacturing
  • Adapteva Parallella 64 Many-core Processor
  • Christmann RECS 3 Micro-server

In Short

PhD HDR HPC and embedded computing expert for AI at DGA MI since 2019. Former research engineer at CEA, LIST in High-Performance and Embedded Computing.

I received both Engineering Degree and Master Thesis in 2005 at INSA de Rennes. I defended my Ph.D. Thesis in 2009 and my HDR Thesis (habilitation to supervise research) in 2022 at the University of Rennes 1.

Current works are related to heterogeneous computing and the data management over mixed shared and distributed memory architectures in massively parallel systems, in search of a tradeoff between performance and energy consumption. This includes many-core processors, micro-servers and computing grid architectures.

With Stephane Louise (CEA), we organize the Alchemy Workshop, held in conjunction with the ICCS Conference, to present recent works on heterogeneous computing architectures.