2009-today Research Engineer at CEA, Saclay.
2015-today In charge of CEA LIST partnership in M2DC and Exanode H2020 European projects on micro-servers and parallel chips.
2013-today Organization of the ICCS/Alchemy track on many-core processors.
2009-2012 CEA-Kalray joint laboratory: Design and implementation of several steps of the Sigma-C dataflow compilation toolchain for many-core processors.
2005-2008 Ph.D. Candidate at University of Rennes 1, INRIA, Rennes.
5-month visit at Sun Microsystems, Santa Clara, USA : Performance evaluation of the JXTA peer-to-peer protocol.
Eligibility Qualifications for Assistant Professor in Computer Science (CNU Section 27) 2010 & 2015.
2003-2005 Master Engineering & Master Research in Computer Science at INSA Rennes.
3-month internship at Siradel: Design and implementation of a data exchange format for the Volcano radio propagation model suite.