Welcome to Loïc Cudennec Website

  • Kalray MPPA-256 Many-core Processor
  • Intel Itanium Processor
  • Tera 100 / TGCC / Curie
  • Smart Manufacturing
  • Adapteva Parallella 64 Many-core Processor
  • Christmann RECS 3 Micro-server

Contact

Professional

DGA MI, AI Department
Email: loic.cudennec@def.gouv.fr

Network

ORCID: 0000-0002-6476-4574
LinkedIn: loiccudennec
DBLP: Cudennec:Lo=iuml=c
Scholar: 4tYiMawAAAAJ
HAL: Loic+Cudennec

Short Selection

Adaptive message passing polling for energy efficiency: Application to software‐distributed shared memory over heterogeneous computing resources.

Loïc Cudennec. Concurrency Computat Pract Exper. 2020;e5960.

Autonomous vehicles, smart manufacturing, heterogeneous systems, and new high‐performance embedded computing (HPEC) applications can benefit from the reuse of code coming from the high‐performance computing world. However, unlike for HPC, energy efficiency is critical in embedded systems, especially when running on battery power. Code base from HPC mostly relies on the message passing interface (MPI) message passing runtime to deal with distributed systems. MPI has been designed primarily for performance and not for energy efficiency. One drawback is the way messages are received, in an energy‐consuming busy‐wait fashion. In this work, we study a simple approach in which receiving processes are put to sleep instead of constantly polling. We implement this strategy at the user level to be transparent to the MPI runtime and the application. Experiments are conducted with OpenMPI, MPICH, and MPC, using a video processing application and a software‐distributed shared memory system deployed over two heterogeneous platforms, including the Christmann RECS|Box Antares Microserver. Results show significant energy savings. In some particular cases involving process colocation, we also observe better performance using our strategy which can be explained by a better sharing of the computing resource.

Software-Distributed Shared Memory over Heterogeneous Micro-Server Architecture.

Loïc Cudennec. Euro-Par 2017: Parallel Processing Workshops (Heteropar 2017), Santiago de Compostela, Spain, August 2017.

Nowadays, the design of computing architectures not only targets computing performances but also the energy power savings. Low-power computing units, such as ARM and FPGA-based nodes, are now being integrated together with high-end processors and GPGPU accelerators into computing clusters. One example is the micro-server architecture that consists of a backbone onto which it is possible to plug computing nodes. These nodes can host high-end and low-end CPUs, GPUs, FPGAs and multipurpose accelerators such as manycores, building up a real heterogeneous platform. In this context, there is no hardware to federate memories, and the programmability of such architectures suddenly relies on the developer experience to manage data location and task communications. The purpose of this paper is to evaluate the possibility of bringing back the convenient shared-memory programming model by deploying a software-distributed shared memory among heterogeneous computing nodes. We describe how we have built such a system over a message-passing runtime. Experimentations have been conducted using a parallel image processing application over an homogeneous cluster and an heterogeneous micro-server.

Using the Spring Physical Model to Extend a Cooperative Caching Protocol for Many-Core Processors.

Safae Dahmani, Loïc Cudennec, Stéphane Louise and Guy Gogniat. Proceedings of the IEEE 8th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC-14), Aizu-Wakamatsu, Japan, September 2014.

As the number of embedded cores grows up, the off-chip memory wall becomes an overwhelming bottleneck. As a consequence, it is more and more prevalent to efficiently exploit on-chip data storage. In a previous work, we proposed a data sliding mechanism that allows to store data onto our closest neighborhood, even under heavy stress loads. However, each cache block is allowed to migrate only one time to a neighbor's cache (e.g. 1-Chance Forwarding). In this paper, we propose an extension of our mechanism in order to expand the cooperative caching area. Our work is based on an adaptive physical model, where each cache block is considered as a mass connected to a spring. This technique constrains data migration according to the spring constant and the difference of workloads between cores. This adaptive data sliding approach leads to a balanced spread of data on the chip and therefore improves on-chip storage. On-chip data access has been evaluated using an analytical approach. Results show that the extended data sliding increases the global cache hit rate on the chip, especially in the context of juxtaposed hot spots.

Extended Cyclostatic Dataflow Program Compilation and Execution for an Integrated Manycore Processor.

Pascal Aubry, Pierre-Edouard Beaucamps, Frédéric Blanc, Bruno Bodin, Sergiu Carpov, Loïc Cudennec, Vincent David, Philippe Dore, Paul Dubrulle, Benoît Dupont de Dinechin, François Galea, Thierry Goubier, Michel Harrand, Samuel Jones, Jean-Denis Lesage, Stéphane Louise, Nicolas Morey Chaisemartin, Thanh Hai Nguyen, Xavier Raynaud and Renaud Sirdey. Proceedings of the First International Workshop on Architecture, Languages, Compilation and Hardware support for Emerging ManYcore systems (ALCHEMY 2013), Held in conjunction with the International Conference on Computational Science (ICCS 2013), Barcelona, Spain, June 2013.

The ever-growing number of cores in embedded chips emphasizes more than ever the complexity inherent to parallel programming. To solve these programmability issues, there is a renewed interest in the dataflow paradigm. In this context, we present a compilation toolchain for the Sigma-C language, which allows the hierarchical construction of stream applications and automatic mapping of this application to an embedded manycore target. As a demonstration of this toolchain, we present an implementation of a H.264 encoder and evaluate its performance on the embedded manycore chip MPPA.

Building Hierarchical Grid Storage Using the Gfarm Global File System and the JuxMem Grid Data-Sharing Service.

Gabriel Antoniu, Loïc Cudennec, Majd Ghareeb and Osamu Tatebe. Proceedings of the 14th International Euro-Par Conference (Euro-Par 2008), p.456-465, Las Palmas de Gran Canaria, Spain, August 2008.

As more and more large-scale applications need to generate and process very large volumes of data, the need for adequate storage facilities is growing. It becomes crucial to efficiently and reliably store and retrieve large sets of data that may be shared at the global scale. Based on previous systems for global data sharing (global file systems, grid data-sharing services), this paper proposes a hierarchical approach for grid storage, which combines the access efficiency of RAM storage with the scalability and persistence of the global file system approach. Our proposal has been validated through a prototype that couples the Gfarm file system with the JuxMem data-sharing service. Experiments on the Grid'5000 testbed confirm the advantages of our approach.

Performance scalability of the JXTA P2P framework.

Gabriel Antoniu, Loïc Cudennec, Mathieu Jan and Mike Duigou. Proceedings of the IEEE International Parallel & Distributed Processing Symposium (IPDPS 2007), p.108, Long Beach, California, USA, March 2007.

Features of the P2P model, such as scalability and volatility tolerance, have motivated its use in distributed systems. Several generic P2P libraries have been proposed for building distributed applications. However, very few experimental evaluations of these frameworks have been conducted, especially at large scales. Such experimental analyses are important, since they can help system designers to optimize P2P protocols and better understand the benefits of the P2P model. This is particularly important when the P2P model is applied to special use cases, such as grid computing. This paper focuses on the scalability of two main protocols proposed by the JXTA P2P platform. First, we provide a detailed description of the underlying mechanisms used by JXTA to manage its overlay and propagate messages over it: the rendezvous protocol. Second, we describe the discovery protocol used to find resources inside a JXTA network. We then report a detailed, large-scale, multi-site experimental evaluation of these protocols, using the nine clusters of the French Grid'5000 testbed.

Publications

Heterogeneous Computing

Data management model to program irregular compute kernels on FPGA: application to heterogeneous distributed system.
Erwan Lenormand, Thierry Goubier, Loïc Cudennec and Henri-Pierre Charles. Euro-Par 2021: Parallel Processing Workshops (Heteropar 2021), Lisbon, Portugal, August 2021.
Modèle de programmation pour noyaux de calcul irréguliers sur accélérateur reconfigurable dans un système distribué hétérogène.
Erwan Lenormand, Thierry Goubier, Loïc Cudennec and Henri-Pierre Charles. Conférence d’informatique en Parallélisme, Architecture et Système (Compas'2021), Lyon, France, Juillet 2021.
Software-Distributed Shared Memory for Heterogeneous Machines: Design and Use Considerations.
Loïc Cudennec. CEA Report, September 2020.
A combined fast/cycle accurate simulation tool for reconfigurable accelerator evaluation: application to distributed data management.
Erwan Lenormand, Thierry Goubier, Loïc Cudennec and Henri-Pierre Charles. 31st International Workshop on Rapid System Prototyping (RSP), Online Streaming, September 2020.
Experiments using a Software-Distributed Shared Memory, MPI and 0MQ over Heterogeneous Computing Resources.
Loïc Cudennec and Kods Trabelsi. Euro-Par 2020: Parallel Processing Workshops (ParaMo 2020), Online Streaming, August 2020.
Adaptive Message Passing Polling for Energy Efficiency: Application to Software-Distributed Shared Memory over Heterogeneous Computing Resources.
Loïc Cudennec. Concurrency Computat Pract Exper. 2020;e5960.
Attribute-Based Encryption and its Application to a Software-Distributed Shared Memory.
Oana Stan, Loïc Cudennec and Louis Syoën. Proceedings of the 17th International Joint Conference on e-Business and Telecommunications - Volume 3: SECRYPT, Online Streaming, July 2020.
Application Topology Definition and Tasks Mapping for Efficient Use of Heterogeneous Resources.
Kods Trabelsi, Loïc Cudennec and Rihab Bennour. Euro-Par 2019: Parallel Processing Workshops (Heteropar 2019), Göttingen, Germany, August 2019.
Unification des mémoires réparties dans un système hétérogène avec accélérateur reconfigurable : exposé de principe.
Erwan Lenormand, Loïc Cudennec, Henri-Pierre Charles. Conférence d’informatique en Parallélisme, Architecture et Système (Compas'2019), Anglet, France, June 2019.
Merging the Publish-Subscribe Pattern with the Shared Memory Paradigm.
Loïc Cudennec. Euro-Par 2018: Parallel Processing Workshops (Heteropar 2018), Turin, Italy, August 2018.
M2DC - A Novel Heterogeneous Hyperscale Microserver Platform.
Ariel Oleksiak, Michal Kierzynka, Wojciech Piatek, Micha vor dem Berge, Wolfgang Christmann, Stefan Krupop, Mario Porrmann, Jens Hagemeyer, René Griessl, Meysam Peykanu, Lennart Tigges, Sven Rosinger, Daniel Schlitt, Christian Pieper, Udo Janssen, Holm Rauchfuss, Giovanni Agosta, Alessandro Barenghi, Carlo Brandolese, William Fornaciari, Gerardo Pelosi, Joao Pita Costa, Mariano Cecowski, Robert Plestenjak, Justin Cinkelj, Loïc Cudennec, Thierry Goubier, Jean-Marc Philippe, Chris Adeniyi-Jones, Javier Setoain, Luca Ceva. Hardware Accelerators in Data Centers, 109-128 (2018).
Software-Distributed Shared Memory over Heterogeneous Micro-Server Architecture.
Loïc Cudennec. Euro-Par 2017: Parallel Processing Workshops (Heteropar 2017), Santiago de Compostela, Spain, August 2017.
M2DC - Modular Microserver DataCentre with heterogeneous hardware.
Ariel Oleksiak, Michal Kierzynka, Wojciech Piatek, Giovanni Agosta, Alessandro Barenghi, Carlo Brandolese, William Fornaciari, Gerardo Pelosi, Mariano Cecowski, Robert Plestenjak, Justin Cinkelj, Mario Porrmann, Jens Hagemeyer, René Griessl, Jan Lachmair, Meysam Peykanu, Lennart Tigges, Micha vor dem Berge, Wolfgang Christmann, Stefan Krupop, Alexandre Carbon, Loïc Cudennec, Thierry Goubier, Jean-Marc Philippe, Sven Rosinger, Daniel Schlitt, Christian Pieper, Chris Adeniyi-Jones, Javier Setoain, Luca Ceva, Udo Janssen. Microprocessors and Microsystems - Embedded Hardware Design, 52: 117-130 (2017).
The M2DC Project: Modular Microserver DataCentre.
Ariel Oleksiak, Michal Kierzynka, Giovanni Agosta, Carlo Brandolese, William Fornaciari, Gerardo Pelosi, Micha Vor Dem Berge, Wolfgang Christmann, Stefan Krupop, Mariano Cecowski, Robert Plestenjak, Justin Cinkelj, Mario Porrmann, Jens Hagemeyer, Rene Griessl, Meysam Peykanu, Lennart Tigges, Loïc Cudennec, Thierry Goubier, Jean-Marc Philippe, Sven Rosinger, Daniel Schlitt, Christian Pieper, Chris Adeniyi-Jones and Udo Janssen. Euromicro Conference on Digital System Design (DSD 2016), Limassol, Cyprus, September 2016.
Data centres for IoT applications: The M2DC approach (Invited paper).
Michal Kierzynka, Ariel Oleksiak, Giovanni Agosta, Carlo Brandolese, William Fornaciari, Gerardo Pelosi, Micha vor dem Berge, Wolfgang Christmann, Stefan Krupop, Mariano Cecowski, Robert Plestenjak, Justin Cinkelj, Mario Porrmann, Jens Hagemeyer, Rene Griessl, Meysam Peykanu, Lennart Tigges, Loïc Cudennec, Thierry Goubier, Jean-Marc Philippe, Sven Rosinger, Daniel Schlitt, Christian Pieper, Chris Adeniyi-Jones, Udo Janssen and Luca Ceva. International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS 2016), p.293-299, Agios Konstantinos, Greece, July 2016.

Memory Consistency for Manycore Processors

Network Contention-aware Method to Evaluate Data Coherency Protocols within a Compilation Toolchain.
Loïc Cudennec, Safae Dahmani, Guy Gogniat, Cédric Maignan and Martha Johanna Sepùlveda. Proceedings of the IEEE 10th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC-16), Lyon, France, September 2016.
Modèles temporels d’évaluation des protocoles de gestion des données.
Hamza Chaker, Loïc Cudennec, Safae Dahmani, Guy Gogniat, Cédric Maignan and Martha Johanna Sepùlveda. Conférence d’informatique en Parallélisme, Architecture et Système (Compas'2016), Lorient, France, Juillet 2016.
A Fast Evaluation Approach of Data Consistency Protocols within a Compilation Toolchain.
Loïc Cudennec, Safae Dahmani, Guy Gogniat, Cédric Maignan and Martha Johanna Sepùlveda. Proceedings of the Fourth International Workshop on Architecture, Languages, Compilation and Hardware support for Emerging ManYcore systems (ALCHEMY 2016), Held in conjunction with the International Conference on Computational Science (ICCS 2016), San Diego, CA, USA, June 2016.
Pattern Based Cache Coherency Architecture for Embedded Manycores.
Jussara Marandola, Stephane Louise and Loïc Cudennec. Proceedings of the Fourth International Workshop on Architecture, Languages, Compilation and Hardware support for Emerging ManYcore systems (ALCHEMY 2016), Held in conjunction with the International Conference on Computational Science (ICCS 2016), San Diego, CA, USA, June 2016.
A Multiobjective Consistency Decision Engine for a Manycore Compilation Platform using an Evolutionary Approach.
Safae Dahmani, Sergiu Carpov, Loïc Cudennec and Guy Gogniat. Evolutionary Multiobjective Optimization (EMO 2015), held in conjunction with the 23rd Intl. Conf. on Multiple Criteria Decision Making (MCDM 2015), Hamburg, Germany, August 2015.
Cycle-based Model to Evaluate Consistency Protocols within a Multi-protocol Compilation Toolchain.
Hamza Chaker, Safae Dahmani, Loïc Cudennec, Guy Gogniat and Martha Johanna Sepùlveda. Proceedings of the International Workshop on Code Optimisation for Multi and Many-cores (COSMIC 2015), in conjunction with CGO, San Francisco, California, USA, February 2015.
Aide à la décision pour le choix et le paramétrage de protocoles de cohérence des données.
Safae Dahmani, Loïc Cudennec et Guy Gogniat. 16ème conférence ROADEF Société Française de Recherche Opérationnelle et Aide à la Décision, Marseille, France, Février 2015.
Using the Spring Physical Model to Extend a Cooperative Caching Protocol for Many-Core Processors.
Safae Dahmani, Loïc Cudennec, Stéphane Louise and Guy Gogniat. Proceedings of the IEEE 8th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC-14), Aizu-Wakamatsu, Japan, September 2014.
Adaptive Cooperative Caching for Many-cores systems.
Safae Dahmani, Loïc Cudennec and Guy Gogniat. Proceedings of the Ninth International Summer School on Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems (HiPEAC ACACES 2013), Fiuggi, Italy, July 2013.
Introducing a Data Sliding Mechanism for Cooperative Caching in Manycore Architectures.
Safae Dahmani, Loïc Cudennec and Guy Gogniat. Proceedings of the 18th International Workshop on High-Level Parallel Programming Models and Supportive Environments (HIPS 2013), Held in conjunction with IPDPS, Boston, Massachusetts, USA, May 2013.
Enhancing Cache Coherent Architecture With Access Patterns for Embedded Manycore Systems.
Jussara Marandola, Stéphane Louise, Loïc Cudennec, Jean-Thomas Acquaviva and David Bader. Proceedings of the International Symposium on System-on-Chip (SoC 2012), Tampere, Finland, October 2012.
Co-Designed Cache Coherency Architecture for Embedded Multicore Systems.
Jussara Marandola and Loïc Cudennec. Proceedings of the IP-Embedded System Conference and Exhibition (IP-SoC 2011), Grenoble, France, December 2011.
Multi-core System and Method of Data Consistency.
Loïc Cudennec, Jussara Marandola, Jean-Thomas Acquaviva and Jean-Sylvain Camier. FR2970794 (A1), CEA, January 2011.

Manycore Programmability

A short overview of executing Γ Chemical Reactions over the ΣC and τC Dataflow Programming Models.
Loïc Cudennec and Thierry Goubier. Proceedings of the Third International Workshop on Architecture, Languages, Compilation and Hardware support for Emerging ManYcore systems (ALCHEMY 2015), Held in conjunction with the International Conference on Computational Science (ICCS 2015), Reykjavik, Iceland, June 2015.
Compilation itérative pour l’exécution de programmes chimiques sur une chaîne de compilation flot de données.
Loïc Cudennec et Thierry Goubier. 16ème conférence ROADEF Société Française de Recherche Opérationnelle et Aide à la Décision, Marseille, France, Février 2015.
Generating Code and Memory Buffers to Reorganize Data on Many-core Architectures.
Loïc Cudennec, Paul Dubrulle, François Galea, Thierry Goubier and Renaud Sirdey. Proceedings of the Second International Workshop on Architecture, Languages, Compilation and Hardware support for Emerging ManYcore systems (ALCHEMY 2014), Held in conjunction with the International Conference on Computational Science (ICCS 2014), Cairns, Australia, June 2014.
Throughput constrained parallelism reduction in cyclo-static dataflow applications.
Sergiu Carpov, Loïc Cudennec and Renaud Sirdey. Proceedings of the 10th International Conference on Computational Science (ICCS 2013), Barcelona, Spain, June 2013.
Extended Cyclostatic Dataflow Program Compilation and Execution for an Integrated Manycore Processor.
Pascal Aubry, Pierre-Edouard Beaucamps, Frédéric Blanc, Bruno Bodin, Sergiu Carpov, Loïc Cudennec, Vincent David, Philippe Dore, Paul Dubrulle, Benoît Dupont de Dinechin, François Galea, Thierry Goubier, Michel Harrand, Samuel Jones, Jean-Denis Lesage, Stéphane Louise, Nicolas Morey Chaisemartin, Thanh Hai Nguyen, Xavier Raynaud and Renaud Sirdey. Proceedings of the First International Workshop on Architecture, Languages, Compilation and Hardware support for Emerging ManYcore systems (ALCHEMY 2013), Held in conjunction with the International Conference on Computational Science (ICCS 2013), Barcelona, Spain, June 2013.
Parallelism Reduction Based on Pattern Substitution in Dataflow Oriented Programming Languages.
Loïc Cudennec and Renaud Sirdey. Proceedings of the 9th International Conference on Computational Science (ICCS 2012), p.146-155, Omaha, Nebraska, USA, June 2012.

Smart Manufacturing

Deploying New Functionality to Manufacturing Resources Safely at Runtime.
Julius Pfrommer, Miriam Schleipen, Selma Azaiez, Michael Boc, Loïc Cudennec, Selma Kchir, Thibaud Tortech and Xenia Klinge. IEEE International Conference on Emerging Technology & Factory Automation (ETFA 2016), Berlin, Germany, September 2016.
Towards Flexibility in Future Industrial Manufacturing: A Global Framework for Self-Organization of Production Cells.
Selma Azaiez, Michael Boc, Loïc Cudennec, Max Da Silva Simoes, Jens Haupert, Selma Kchir, Xenia Klinge, Wael Labidi, Karima Nahhal, Julius Pfrommer, Miriam Schleipen, Christian Schulz and Thibaud Tortech. Second international workshop on Recent Advances on Machine-to-Machine Communication (RAMCOM 2016), hold in conjunction with the 7th International Conference on Ambient Systems, Networks and Technologies (ANT-2016), Madrid, Spain, May 2016.

Grid Computing

Building Hierarchical Grid Storage Using the Gfarm Global File System and the JuxMem Grid Data-Sharing Service.
Gabriel Antoniu, Loïc Cudennec, Majd Ghareeb and Osamu Tatebe. Proceedings of the 14th International Euro-Par Conference (Euro-Par 2008), p.456-465, Las Palmas de Gran Canaria, Spain, August 2008.
CoRDAGe: towards transparent management of interactions between applications and ressources.
Loïc Cudennec, Gabriel Antoniu and Luc Bougé. Proceedings of the International Workshop on Scalable Tools for High-End Computing (STHEC 2008), p.13-24, Kos, Greece, June 2008.
Un service hiérarchique distribué de partage de données pour grille.
Loïc Cudennec. Proceedings of the The Rencontres francophones du Parallélisme (RenPar '18 ), Fribourg, Suisse, Février 2008.
Building a DBMS on top of the JuxMem Grid Data-Sharing Service.
Abdullah Almousa Almaksour, Gabriel Antoniu, Luc Bougé, Loïc Cudennec and Stéphane Gançarski. Proceedings of the HiPerGRID Workshop (HiPerGRID 2007), Brasov, Romania, September 2007.
Performance scalability of the JXTA P2P framework.
Gabriel Antoniu, Loïc Cudennec, Mathieu Jan and Mike Duigou. Proceedings of the IEEE International Parallel & Distributed Processing Symposium (IPDPS 2007), p.108, Long Beach, California, USA, March 2007.
A practical evaluation of a data consistency protocol for efficient visualization in grid applications.
Gabriel Antoniu, Loïc Cudennec, Sébastien Monnet. Proceedings of the International Workshop on High-Performance Data Management in Grid Environment (HPDGrid 2006), Rio de Janeiro, Brazil, July 2006.
Extending the entry consistency model to enable efficient visualization for code-coupling grid applications.
Gabriel Antoniu, Loïc Cudennec, Sébastien Monnet. Proceedings of the 6th IEEE/ACM International Symposium on Cluster Computing and the Grid (CCGrid 2006), p.552-555, Singapore, Singapore, May 2006.
Extension du modèle de cohérence à l'entrée pour la visualisation dans les applications de couplage de codes sur grilles.
Loïc Cudennec and Sébastien Monnet. Actes des Journées francophones sur la Cohérence des Données en Univers Réparti (CDUR 2005), Paris, France, Novembre 2005.

Ph.D. and Master Thesis

Contributions pour l’utilisation des machines parallèles, réparties et hétérogènes à travers le prisme de la gestion des données partagées.
Loïc Cudennec. Thèse d' Habilitation à Diriger des Recherches (HDR). Université de Rennes I, DGA MI, Septembre 2022.
CoRDAGe : Un service générique de co-déploiement et redéploiement d'applications sur grilles.
Loïc Cudennec. Thèse de Doctorat. Université de Rennes I, INRIA Centre Bretagne Atlantique, IRISA, Janvier 2009.
Experimentations With CoRDAGe, A Generic Service For Co-Deploying and Re-Deploying Applications On Grids.
Loïc Cudennec, Gabriel Antoniu and Luc Bougé. INRIA Research Report, RR-7086, INRIA Centre Bretagne Atlantique, February 2009.
Modèles et protocoles de cohérence des données en environnement volatile.
Loïc Cudennec. Rapport de fin d'études. INSA de Rennes, INRIA Centre Bretagne Atlantique, IRISA, Juin 2005.
Gestion de la cohérence des données dans les systèmes distribués.
Loïc Cudennec. Étude bibliographique. INSA de Rennes, INRIA Centre Bretagne Atlantique, IRISA, Février 2005.

Misc

Constraint programming based iterative heuristic for scheduling trains and maintenance tasks.
Sergiu Carpov, Loïc Cudennec and Francois Galea. 2016 RAS problem solving competition (INFORMS 2016), Nashville, USA, November 2016.
Vers la classification darwinienne d'un processeur fossile.
Xavier Le Guillou and Loïc Cudennec. Proceedings of the The Third Review of April Fool's day Transactions (RAFT'2008), p.9-21, Grenoble, France, Avril 2008.